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The New Solid State Coil

I was experimenting with my new solid state driver, when I noticed that every time I ran the coil the wall clock stopped! Quite clearly I was generating a reverse temporal field which was stopping time in the coils vicinity - I am sure that I am only a few tweaks away from a working time machine. With I bit of luck I will have already completed it and I just have to wait for my future self to come back and tell me how I did/will do it - maybe I could bring next weeks lottery numbers at the same time.

Okay now the technical stuff. The new driver works - its a just a handful of TTL chips. The half bridge - which I complete ages ago worked quite happily with it.

Set up

The half bridge with just one IRF 740 on each side. 0-140V DC smoothed powersupply.

New Driver board TTL interupter (3524 as before) 0-95%, 48 - 900Hz

VCO followed by divider 350KHz - 70KHz moving a single link lets you double or half those numbers.

Overcurrent dector - switches off for 1mS and flashes LED

A couple of 4421's diver chips 12v, 9 Amps.

No dead time from control board - correspondence with Richie Burnett convince me that too much dead time was a problem - all the dead  time is supplied by the isolating transformer and the FET gate capacitance - switching from -12v to 12v ensures that they turn off faster than they turn on - no shoot through.

Primary: tapped 28 turn (15+7+6) on 7" dia thick wall PVC pipe. about 5" high windings in total and very roughly made!

Seconday

4 1/4 inch diameter, 60cm winding length 0.4mm wire

First Results.

The oscilloscope showed much less ringing and overshoots with the primary coil compared to using a transformer for bottom feeding.

9" arcs at 140v and about 2A. using just 7 primary turns.

Naturely I over reduced the current protection and cranked it up. ZAP fried the 2 output transistors - it must have been the demand of generating the reverse temporal field.

But as I can but in 4 transistors at each side, put the voltage up to 350v and build a second half bridge for a full bridge this looks very promising!

Second Run

Ran the half bridge up to 330V (rectified and smoothed mains) using 4 of 740's, 15" sparks drawing about 1.5 amps on times of about 30%, 100Hz, great noise -especially as I put the interupter frequency up.

To my surprise I didn't blow a single fet - but then I didn't switch off the protection circuit. But it kicks in more often than I would expect, 1:128 current transformer, into a 20 ohm resistor

On DC it takes 5V to trigger the OC. corresponding to 32A. I did the last runs with this adjusted to 7.5V ie 48A. It was triggering a lot. I'm not going to adjust this any further - if no more FET's blowI'll know they can stand the voltage. (If I buy more FET's though I will go for 500 or 600v jobs - the mtp10n40e (equiv irf740) is rated at 400v - not a lot of head room.

Third Run

I put my large bucket coil inside an even bigger bucket with 8 turns around it - drew al lot of current - I raised the secondary by about 3" - on yogurt pots.

Much more controlable - had good fun running this. 2 observations despite the extra induction I didn't seem to be getting longer sparks - never got more than 12" out of it power levels seemed to be similar but its hard to be exact. Sticking 1" of wire to the outside of the toriod to give a sharp break out point did not seem to reduce the maximum spark length.

Eventually - while I was running the interupter at 95% it blew - it was drawing about 4Amp at the time at 300V plus. There was a loud bang - as I hastily turned down the variac it continued to function! on inspection two fets one from either side had really blown - the cases had shattered in two. I cut them out and ran it at low power confirming that everything else was working. I was very touched clearly the FETs had blown themselves up to protect the fuse.

View the schematics

The 4 // FET's are hot shoed - ie the centre leg is not used ised the mounting bolt connects the tab to the PCB track on the bottom the bolt is of course insulated from the heatsink. The other 2 power devices are the blocking diode and the fast reverse diode. Still a snubber on this board: 3//1K 5W resistors + 470pf. But I intend to dispense with this - I'm not sure that they help.

The ETD29 isolating transformer is an overkill - I'll be using a 8 turns round a simple toriod in future (Farnell 3056995, 25.8*14*10.6 Ae48.9 material 3e25.)

I've just done a few runs with the half bridge driving a a bottom feeding transformer - to compare with primary coupling. Lots of grief - massive ringing at about 1mHz - maybe if I wind a 1mHz coil...... Never got more than 4" out of it - suspect that rf was feeding back into the control electronics. I replaced 2 LS chips with HC but no real difference. It blew eventually though I had two fets on each side - only one out of the four blew. Ritchie Burnett gave this summary of the grief:  the transformer containes lots of parasitic elements such as leakage inductance, magnetising inductance, inter-winding capacitance, inter-layer capacitance, winding-winding capacitance. The list is almost endless, and all of these contribute to spurious resonances which are "shock-excited" by the MOSFETs sharp switching transitions.

Power supply: I've just put 8 * 330uF 450V caps in a box with 400V 35A bridge,  a surge limiter and a 6A IEC plug, fused with line filter. I brought it up to power through a big resistor - a 60W light bulb incrementaly over 3 hours old caps need time to reform. I now have a 300V supply with variac.

I prefer to build each module on its own board and then mount them on a matrix board - top the PSU 12v to interupter, 5v to TTL, 12v to driver chips

Left to right interupter, vco and divider, gates and monostables, driver chips (2 to a 20 pin socket)

The control electronics can be connected to the electrical earth but not next to the RF earth. If you are using rectified mains then you cannot earth the power side.

I got ISIS schematic editor, from (with a spice thing and ARES pcb maker) Nice I'll probably register the schematic editor (20). Though its quite usable and the nags aren't too annoying. I use PIA for pcb making.

Full Bridge

First prototype - the two halves are identical

The bridge is working - with half the transistors in place. Ran it with the 4" coil  and with the bucket 10" coil - tried it with a variety of top loads - best result of the morning was with the bucket coil and 4" by 32" toriod - despite the sharp break out point it manage 18" of arc and the occasional strike to 20". It would have done more but for the current limiting.

70kHz, interupter 30%, 80Hz, current draw about 1.5A but this is because of the current limiter - at 225V it draws 3A without tripping the over current proction which is set at 60A (the peak current could really be as high as this)

I was playing with the full bridge today, (16 FETS) it was running well 18" arcs no bother at all naturally I decided to up the current limit a little :) I got a 21" arc to ground which held for about 10 seconds - then bang! 4 fets had blown themselves apart - no dificulty identifying the failed components.

initial runs were with the current limit set to a theoretical 96A peak - when it blew it was set to 170A.

Current depended on the amount of spark, interupt setting, and tuning which makes it hard to get numbers out.

When it blew the interupter was set for 15%, - the DC current was about 2A (equiv to about 14A for 100%)

Interesting the four fets that blew - one per leg, were all the FETs which were next to the schottky output diodes. Everything is the same for each fet apart from the track lengths, of course at these kind of currents the induction of an extra 1" of track could be significant. But the power is coming in from one side and going out the other - in theory all the paths should be equal. I am concerned though that because of the way I connect the toriod winding to the centre part of the fet source rail some of the voltages produced along the source rail by large rapidly changing currents may be appearing accross the gates.

One of the things that we conviently ignore is that a wire is not just a wire it also has inductance. So we can add to the cicuit diagram a whole lot of tiny inductances such as L-TRK the induction of the length of track between one FET and the next. These are significant because we have a large currents rising and falling very quickly along these drain and source rails. V=L di/dt. Back of an envelope calculations suggest that when the current is very high then this could amount to a few volts. Particularly if the driver is not quite in tune and so that a large current is present during a rapid switch off. The goodnews is that because the current comes in at one side and goes out the other all of the paths are about equal - the current should still be shared equally between the FET's. The bad new is that by tying the ends of the pulse transformer to the mid point of the rail the gate voltage will vary by +/-  1.5* L-TRK * di/dt. A large current going through a fet with a reduced gate voltage is bad news. ZAP.

The current version now has a separate winding for each Fet connected as possible to each source.

No aparent heating in the intact FETs, diodes or 4422's. Some of the zeners accross the blown fets were also faulty. Other zeners checked ok. I'll strip out, replace, and set the current limit to 120A and try again. But it looks like I'll need to change the layout and maybe get beefier FET's to repeat 21inches or to go for 24" :( And of course if I do buy more expensive FETs then I will blow them up too :(

This is the layout for the next full bridge - there are a few mods - reintroduced some snubbers and allow for seperate windings for each fet attacthed to each source and gate resistor. Also the literatre suggests that the zeners can cause parasitic oscillations if connented directly to the FET lead, better to connect to the other side of the gate transistor. Finally I am going to upgrade the FET's - I've just bought some irfb11n50a's   500v, 11A (44 peak) compared to irf740  400v, 10A, (32 amp peak).

 

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